COLLEGE OF ENGINEERING

Electrical Engineering

EE288 Data Conversions/Analog Mixed-Signal ICs

Section 01

SPRING 2021

Course and Contact Information

Instructor: Sang-Soo Lee
Office Location: ENGR 259
Phone: (408) 924-3950
Email: sang-soo.lee@sjsu.edu
Office Hours: MW 5:00 PM - 5:45 PM
Class Days/Time: MW 6:00 PM - 7:15 PM
Classroom: Online Zoom Meeting
Prerequisites: Graduate standing or instructor consent
GE/SJSU Studies Category:

Course Description

Study of different architectures for analog to digital convertors and digital to analog convertors. System level modeling & simulation. Design considerations and techniques for circuit implementation. Data conversion testing methods.

Course Format

This course will be delivered in a hybrid format. Part of it will be delivered online through live zoom meeting, and the other part will be conducted asynchronously through the learning materials presented in the course Canvas. You are responsible for regularly checking the Canvas to learn any updates on syllabus, handouts, notes, assignment instructions, etc. Students can come to campus to use the Cadence IC design lab computers if they want to or if they do not have the equipment to run the Cadence software required for the course. The hybrid component of this course is meant to provide students with some flexibility in their learning.

Service Learning or Credit Bearing Internships

Faculty Webpage and MySJSU Messaging

https://www.sjsu.edu/people/sang-soo.lee/

Program Information

Course Goals

GE Learning Outcomes

Course Learning Outcomes (CLO)

Upon successful completion of this course, students will be able to

Understand the concept of INL, DNL, ENOB, THD, SNR, and SNDR of data converters
Model, analyze, and design different data converters circuits
Use modern engineering CAD tools for computations, modeling, simulations, analysis, and design
Verify the theory with hands-on lab simulations

Required Texts, Readings, and Technology

Textbook

No textbook required. Lecture notes, slides, and papers will be posted in Canvas.

Other Technology Requirements / Equipment / Material

To be successful in this course, make sure your computers or devices have:

Reliable Internet access
VPN (Links to an external site.) & remote access to connect to SJSU Cadence Lab computer
Access to Canvas. Ensure your web browser and browser settings are Canvas compatible

Library Liasion

Course Requirements and Assignments

Assignments and the final design project are mainly based on Cadence Spectre simulations and are closely related to the topics discussed in the class. Information on how to setup and run the Cadence simulation tools will be provided, and students are required to master this CAD tool by practicing Cadence tutorials provided by the instructor. The final design project requires extensive simulations using Cadence Spectre. Each student must write a project report in power point slide format and submit the pdf version of the report including key simulation data, images, and graphs to Canvas to receive a credit. More details on the design project will be provided in the course Canvas.

“Success in this course is based on the expectation that students will spend, for each unit of credit, a minimum of 45 hours over the length of the course (normally three hours per unit per week) for instruction, preparation/studying, or course related activities, including but not limited to internships, labs, and clinical practice. Other course structures will have equivalent workload expectations as described in the syllabus.”

Final Examination or Evaluation

The date of the final exam is shown on the course schedule section of the course syllabus according to the school calendar. The exam will be online open book. There will be no make-up exam and those absent will receive no credit. Students must write their answers clearly in an organized fashion and submit the answer sheets to Canvas. Further instructions on exam rule will be provided in the course Canvas.

Grading Information

Please also see Spring 2021 Special University Grading Policy (https://www.sjsu.edu/registrar/academicrecords/grade-changes.php)

Homework	30%
Design project	30%
Final exam	40%

Determination of Grades

90% and above	A
89% - 85%	A minus
84% - 82%	B plus
81% - 79%	B
78% - 75%	B minus
74% - 72%	C plus
71% - 69%	C
68% - 65%	C minus
64% - 62%	D plus
61% - 59%	D
58% - 55%	D minus
below 55%	F

Classroom Protocol

Students will turn their cell phones off or put them on vibrate mode while in class. During the online class, students will mute themselves unless they need to speak for questions and answers.

Classroom Recording Policy

Instructor may record certain lectures and post them in Canvas for those who cannot attend the online lecture for any reason. Any recordings posted in Canvas are for the student’s personal academic use only and should not be distributed in any manner to any other individual. Students are not allowed to post class materials including videos and lecture notes in any other online site.

University Policies

Per University Policy S16-9, university-wide policy information relevant to all courses, such as academic integrity and accommodations will be available on Office of Graduate and Undergraduate Programs’ Syllabus Information web page.

Additional Information

This course is offered only in SPRING semester.

EE Department Honor Code

The Electrical Engineering Department will enforce the following Honor Code that must be read and accepted by all students.

“I have read the Honor Code and agree with its provisions. My continued enrollment in this course constitutes full acceptance of this code. I will NOT:

Take an exam in place of someone else, or have someone take an exam in my place
Give information or receive information from another person during an exam
Use more reference material during an exam than is allowed by the instructor
Obtain a copy of an exam prior to the time it is given
Alter an exam after it has been graded and then return it to the instructor for re-grading
Leave the exam room without returning the exam to the instructor.”

Measures Dealing with Occurrences of Cheating

Department policy mandates that the student or students involved in cheating will receive an “F” on that evaluation instrument (paper, exam, project, homework, etc.) and will be reported to the Department and the University.
A student’s second offense in any course will result in a Department recommendation of suspension from the University.

Course Schedule

Week	Date	Topics, Readings, Assignments, Deadlines
1	1/27	Course introduction
2	2/1	ADC architecture 1
2	2/3	ADC architecture 2
3	2/8	ADC architecture 3
3	2/10	Cadence Sprectre Tutorial
4	2/15	ISSCC - review of MOSFET and OTA basics
4	2/17	ISSCC - review of fully-differential OPAMP
5	2/22	Sampling
5	2/24	Sample and Hold 1
6	3/1	Sample and Hold 2
6	3/3	Bootstrapped and 2-phase clock circuits
7	3/8	ADC Perfornance metrics
7	3/10	Switched-capacitor circuits 1
8	3/15	Switched-capacitor circuits 2
8	3/17	Comparator 1
9	3/22	Comparator 2
9	3/24	Comparator 3
10	3/29	No class - Spring break
10	3/31	No class - Spring break
11	4/5	Flash ADC 1
11	4/7	Flash ADC 2
12	4/12	SAR ADC 1
12	4/14	SAR ADC 2
13	4/19	SAR ADC 3
13	4/21	Pipelined ADC 1
14	4/26	Pipelined ADC 2
14	4/28	Pipelined ADC 3
15	5/3	DAC architecture 1
15	5/5	DAC architecture 2
16	5/10	DAC architecture 3
16	5/12	Oversampled ADC 1
17	5/17	Oversampled ADC 2 * Course review
17	5/19	Final exam (5:15 pm - 7:30 pm) open book