Wong, Hiu Yung
Assistant Professor, Electrical Engineering
- Ph.D. EECS, University of California, Berkeley (2006)
- M.Phil. Computer Science and Engineering, Chinese University of Hong Kong (2001)
- B. Eng. Computer Engineering, Chinese University of Hong Kong (1999)
Hiu Yung Wong received his Ph.D. degree in Electrical Engineering and Computer Science from the University of California, Berkeley in 2006. Currently, he is an Assistant Professor in EE department, San Jose State University. From 2006 to 2009, he worked as a Technology Integration Engineer on 45/32nm NOR flash memory in Spansion. From 2009 to 2018, he was a Senior Staff AE in TCAD simulation in Synopsys. He is a senior member of IEEE.
His research interests include NBTI and hot carrier degradation simulation in FinFET/nanowire/nanosheet, wide band gap materials (such as GaN, SiC, Ga2O3 and Diamond) device and reliability/defect simulations, novel semiconductor device design and Design Technology Co-Optimization (DTCO). Part of the activities are reflected in the 50 publications and patents awarded.